1. Field of the Invention
The invention relates to electrically erasable and programmable non-volatile type memories in integrated circuit form and, more particularly in such memories, to a matrix arrangement of redundancy fuses for "FLASH EEPROM" type memories.
2. Discussion of the Related Art
These memories are commercially available for a given capacity, for example 16 megabits for a FLASH EEPROM. Now, the methods used to manufacture integrated circuits very often give rise to defects, notably defects that affect memory cells. Hence, to avoid having an excessively large number of rejects, the manufacturers of these circuits make provision for a certain number of redundant cells designed to replace the defective cells if necessary.
These memories are generally organized in matrices formed by rows and columns of memory cells. Each memory cell can then be selected by a word line associated with each row and a bit line associated with each column. In practice, for reasons of simplicity, the replacement of a defective memory cell is done by replacing the entire row or column that contains this cell. The memory element (row or column memory element) that has to be replaced will depend on the type of defect detected. These redundant elements are put into operation following tests carried out after the manufacture of each integrated circuit. To this end, programmable reconfiguration means are provided for in the integrated circuit so that when the test reveals a defective element, this defective element is automatically replaced by a replacement element chosen from among the redundant elements, and this replacement must be invisible and have no effect on the performance characteristics of the memory. In practice, the reconfiguration means contain circuits to ascertain that the current address present in the memory corresponds to that of a defective element and, if this is the case, these means select a redundant element to replace the defective element.
This automatic replacement is usually done by means of non-volatile programmable registers designed to contain the addresses of the defective elements. In the case of a memory organized in rows and columns, this address will be either the row address or the column address. To make these programmable registers, elements known in the broad sense of the term as "fuses" are used: a fuse defines a binary information element having two states (either intact or programmed). For each defective address to be recorded, a battery of several fuses is used, the number of fuses being equal to the number of bits used to define an address. For a p-bit address, there is a battery of p fuses. The state, whether intact or programmed, of the different fuses of a battery defines a p-bit address. If there are N redundancy rows or columns, i.e. if N defective rows or columns need to be replaced by replacement rows or columns, then N batteries are needed.
Furthermore, with each battery of fuses, there is associated a fuse called a validation fuse for indicating whether the corresponding battery is used or not.
When a replacement element is needed to replace a defective element, the address of this defective element is stored in a battery of fuses and a validation fuse associated with this battery is fused or blown out to indicate that it is actually used to define a replacement operation.
The fuses may be physical fuses (elements of an open circuit that is converted into a short circuit when it is blown out, or vice versa) or, more commonly, the fuses may be non-volatile memory elements such as transistors that are programmed and can no longer be erased thereafter. The blank or intact state of the transistor corresponds to an original condition of the fuse. The programmed state of the transistor corresponds to a blown-out state of the fuse.
Up to now, each redundant element has been associated with a register as well as with a comparator for receiving a value contained in this register and the current address as inputs. When the testing operations are over, the registers are programmed at values representing the addresses of the defective elements. Thus, during operation, if the current address coincides with the value contained in one of the registers, the associated comparator delivers a signal enabling the automatic selection of the associated redundant element. At the same time, the selection of the defective element is inhibited.
This approach therefore requires a number of programmable registers that are equal to the number of redundant elements, each register being associated, by a digit of the address code, with a programming circuit and with a reading circuit. Thus, there is required one programming circuit and one reading circuit for each fuse. This takes up a non-negligible amount of space in the integrated circuit.
Furthermore, this approach requires as many registers to be programmed as there are defective elements detected. However, the presence of non-volatile programmable registers raises problems of reliability due to the fact that they are difficult to manufacture and to program.
In addition to these programmable registers, the programming and reading circuits, each associated with a battery of fuses, take up even more space in the integrated circuit.